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DA9155M 2.5 a companion charger for rapid charging general description DA9155M offers a small solution that can be easily added on to existing main charger circuit s and solves the heat dissipation problem created when the rapid charging feature is a dopted . d a9155m is compatible to all rapid charging technologies such as qualcomm quick c harge ? 2.0 and 3.0 a s well a s mediatek pumpexpress ?. DA9155M features a b uck converter capable of 2.5 a constant out put current and regulates the output current with 5% accuracy. current sensing is performed with a fully integrated circuit. the peak efficiency of the buck converter is 9 2 %. key features input voltage 4.3 - 13.5 v output current 2.5 a 5% current regulation accuracy selectable s witching f requency applications companion charger in smartphone and tablet platforms datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 1 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging 1 block diagram agnd boot pgnd control pvdd en lx buck nirq output current sensing scl sda i 2 c vbat vddio d a 9 1 55 m tp vin vbat monitoring vin monitoring safety timer tjunc monitoring pvdd avdd vbat n figure 1 : DA9155M block diagram. datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 2 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging 2 revision history revision date changes 3.05 22- july -2016 updated first page 3.04 10- may -2016 added max value of v in_ovlo updated max value of v in_uvlo updated typ value of l esr added min value in output current range added min and max values of i lim updated test condition for v bat_ov updated test condition for i q_dis _vin updated description of bit e_rdy in event_b (0x004) register 3.03 24- mar -2016 update specs for i q_no _ pwr _vbat and removed v oh 3.02 01- mar -2016 updated specs for v in2bat , v in2bat_hyst , v in_drop_hyst , v in_drop_acc , v bat_uv_acc , v bat_ov_acc 3.01 15- jan - 2016 update figure 2 for lf35 3.00 09- nov -2015 final datasheet release 3 ordering information the order number consists of the part number followed by a suffix indicating the packing method. for details, please consult the customer portal on the dialog website or your local sales representative. table 1 : ordering i nformation part number package package description DA9155M - xxu72 30 wl - csp tape and reel, 4500pcs datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 3 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging contents general description ............................................................................................................................. 1 key features ......................................................................................................................................... 1 applications ......................................................................................................................................... 1 1 block diagram ................................................................................................................................ 2 2 revision history ............................................................................................................................ 3 3 ordering information .................................................................................................................... 3 contents ............................................................................................................................................... 4 4 pin list ............................................................................................................................................. 6 5 absolute maximum ratings .......................................................................................................... 8 6 recommended operating conditions .......................................................................................... 8 7 electrical character istics .............................................................................................................. 8 1 2 2 11 12 12 1 8 typical characteristics ................................................................................................................ 14 9 system block diagram ................................................................................................................ 15 1 1 2 1 10 funct ional description ................................................................................................................ 16 11 1 111 1 112 1 12 2 1 121 1 122 2 1 1 2 1 21 1 21 1 22 1 22 1 2 11 2 12 2 1 2 1 2 11 register map ................................................................................................................................ 25 111 2 112 2 11 2 datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 4 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging 11.3.1 page control ........................................................................................................ 26 11.3.2 status and events ............................................................................................... 26 11.3.3 vin and vbat monitoring ................................................................................... 27 11.3.4 configuration ....................................................................................................... 28 11.3.5 safety timer ........................................................................................................ 29 11.3.6 buck control ........................................................................................................ 29 11.3.7 interface ............................................................................................................... 30 11.3.8 configuration ....................................................................................................... 30 11.4 p age 1 ............................................................................................................................. 31 11.4.1 page control ........................................................................................................ 31 11.5 page 2 ............................................................................................................................. 31 11.5.1 page control ........................................................................................................ 31 11.6 p age 3 ............................................................................................................................. 31 11.6.1 page control ........................................................................................................ 31 11.7 page 4 ............................................................................................................................. 32 11.7.1 page co ntrol ........................................................................................................ 32 11.8 page 5 ............................................................................................................................. 32 11.8.1 page control ........................................................................................................ 32 11.9 page 6 ............................................................................................................................. 32 11.9.1 page control ........................................................................................................ 32 11.9.2 trimming and engineering ................................................................................... 33 12 application information .............................................................................................................. 34 12.1 pcb layout .......................................................................................................................... 34 12.2 component selection .......................................................................................................... 34 12.2.1 capacitors ............................................................................................................ 34 12.2.2 i nductor ................................................................................................................ 35 datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 5 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging 4 pin list table 2 : DA9155M pin description pin name type description c1 vddio ps io supply b2, b3, b4, c2, c3, d1, d2, d3 agnd gnd analog ground a2 avdd aio internal supply a3 pvdd aio internal supply e2 sda dio data signal of the 2 - wire interface (gpio) e1 scl di clock signal of the 2 - wire interface (gpio) e4 en di control signal for the output current/voltage (gpio) e3 nirq do interrupt signal to host processor (gpio) a5, a6 vin ps input supply b5, b6, c5, c6, d5, d6 vlx ao switching node of buck a4 boot aio supply of the high - side driver b1 vbat ai battery voltage sense, positive terminal a1 vbatn ai battery voltage sense, negative terminal e5, e6 p gnd gnd power grounds of the buck , digital ground c4, d4 nc not connected. short to ground. table 3 : pin type definitions pin type description pin type description di digital input ai analogue input do digital output ao analogue output dio digital input/output aio analogue input/output ps power supply gnd ground connection datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 6 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging figure 2 : DA9155M package outline drawing datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 7 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging 5 absolute maximum ratings table 4 lists the absolute maximum ratings of the device. stressing the device beyond the se ratings may cause permanent damage to the device. functionality of the device is only guaranteed in conditions listed in sections 6 and 7 . operating the device in conditions exceeding those listed in sections 6 and 7 , but still complying with the absolute maximum ratings listed in table 4 , for extended period s of time may affect device reliability. table 4 : absolute maximum ratings parameter symbol note min max unit storage temperature -60 +150 c operating temperature t a -40 +85 c terminal voltage (referenced to pgnd, unless otherwise noted) vin the device is not operational above v in_ovlo . - 0.3 20 v vlx - 0.3 vin v boot - 0.3 vlx+5.5 v vbatp referenced to vbatn - 0.3 6 v all other terminals referenced to agnd - 0.3 5 .5 v esd t olerance hbm 2 kv 6 recommended operating conditions table 5 : recommended operating conditions parameter symbol min max unit operating temperature t a -40 +85 c supply voltage v in 4.3 13.5 v supply voltage io v ddio 1.5 3.6 v 7 electrical characteristics 7.1 digital i/o unless otherwise noted, the following is valid for t a = - 40 to +85 oc, v in = 4.3 to 13.5 v, v bat = 2.6 to 4.4 v table 6 : parameter symbol test conditions min typ max unit input high voltage (en, scl, sda) v ih 0.7 vddio v input low voltage (en, scl, sda) v i l 0.3 vddio v output low voltage (nirq, sda) v ol 0.3 v input capacitance (scl, sda) c in 10 pf datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 8 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging 7.2 v in monitoring unless otherwise noted, the following is valid for t a = - 40 to +85 oc, v in = 4.3 to 13.5 v, v bat = 2.6 to 4.4 v table 7 : parameter symbol test conditions min typ max unit v in to v bat threshold v in2bat falling threshold 225 275 330 mv v in to v bat hysteresis v in2bat_hyst 130 mv v in overvoltage threshold v in_ovlo rising threshold, pulse width greater than 3 s 13.5 15 v v in overvoltage hysteresis v in_ovlo_hyst 2% v in undervoltage threshold v in_uvlo falling threshold 4.085 4.3 4.5 v v in undervoltage hysteresis v in_uvlo_hyst 2% v in drop threshold range v in_drop falling threshold. v in_drop =0x3b 12 v falling threshold. vin_drop =0x37 11.6 v falling threshold. v in_drop =0x23 8.6 v falling threshold v in_drop =0x00 4.3 v v in drop hysteresis v in_drop_hyst 1.5% v in drop accuracy v in_drop_acc vin_drop <= 5.4v - 1.6% +1.6% vin_drop > 5.4v - 1.9% +1.9% 7.3 buck converter table 8 : parameter symbol test conditions min typ max unit input capacitor c in 10 f output capacitor c out nominal 10 22 f output capacitor esr c esr 3 m ? inductor v alue l buck 0.47 h inductor r esistance l esr 24 m ? unless otherwise noted, the following is valid for t a = - 40 to +85 oc, v in = 4.3 to 13.5 v, v bat = 2.6 to 4.4 v datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 9 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging table 9 : parameter symbol test conditions min typ max unit input voltage range v in v in has to be above v bat ( section 7.2 ) 4.3 13.5 v output current range 400 2500 m a output c urrent i out buck_iout = 0x32 750 ma buck_iout = 0x7d 1500 ma buck_iout = 0xe1 2500 ma output current regulation accuracy i out _acc i out = 2.5 a, d 80%, v in = 5v to 12v, t a = 0 to 85 oc ( note 1 ) -5% +5% 1.5 a i out < 2 .5 a, d 80%, v in = 5v to 12v, t a = 25 oc ( note 1 ) -5% +5% 500 ma i out < 1.5 a, d 80%, v in = 5v to 12v, t a = 25 oc ( note 1 ) -10% +10% efficiency v in = 5 v v bat = 4.4 v i out = 2.5 a 96% v in = 9 v v bat = 4.4 v i out = 2.5 a 92% v in = 12 v v bat = 4.4 v i out = 2.5 a 90% switching f requency f osc_tune = 0x0 buck_fsw = 0x0 ( note 2 ) 1.2 mhz osc_tune = 0x0 buck_fsw = 0x2 ( note 2 ) 1.5 mhz osc_tune = 0x0 buck_fsw = 0x3 ( note 2 ) 1 mhz duty cycle d vin 5 v, f =1.5 mhz 15% 85% switching frequency is stepwise reduced above 85% duty cycle 95% minimum off - time t min_off 100 ns high - side r dson r dson - hs including pin and routing 25 m low - side r dson r dson - ls including pin and routing 25 m peak current limit i lim buck_ilim = 0x19 4400 5500 6600 ma buck_ilim = 0x14 4000 5000 6000 ma buck_ilim = 0x0 2050 3000 3820 ma note 1 accuracy may decrease by 5% at d > 80% note 2 1 mhz is recommended for v in 6.5 v and 1.5 mhz for v in > 6.5 v datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 10 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging 7.4 2 - wire interface figure 3 : 2 - wire interface timing unless otherwise noted, the following is valid for t a = - 40 to +85 oc, v in = 4.3 to 13.5 v, v bat = 2.6 to 4.4 v table 10: 2 - wire interface electrical characteristics parameter symbol test conditions min typ max unit spike suppression (scl, sda) t sp fast/fast + mode 0 50 ns high speed mode 0 10 ns b us free time from stop to start condition t buf 0.5 s bus line capacitive load 150 pf standard/fast /fast+ m ode scl clock frequency f scl note 3 0 1000 khz start condition setup time t su_sta 0.26 us start condition hold time t h_sta 0.26 us scl low time t w_ cl 0.5 us scl high time t w_ ch 0.26 us 2 - wire scl and sda rise time t r 1000 ns 2 - wire scl and sda fall time t r 300 ns data setup time t su_d 50 ns data hold - time t h_d 0 ns stop condition setup time t su_sto 0.26 us high speed mode scl clock frequency f scl requires v ddio 1.8 v ( note 3) 0 3400 khz start condition setup time t su_sta 160 ns sda scl 70 % 30 % t f t r t buf 70 % 30 % 1 / f scl t su _ sta t h _ sta t w _ ch t w _ cl t r t f t h _ d t su _ d t sp p s t su _ sto datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 11 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging start condition hold time t h_sta 160 ns scl low time t scl _lo 160 ns scl high time t scl _ h i 60 ns 2 - wire scl and sda rise/fall time t r 160 ns data setup time t su_d 10 ns data hold - time t h_d 0 ns stop condition setup time t su_sto 160 ns note 3 minimum clock frequency is 10 khz if 2w_to is enabled 7.5 temperature supervision unless otherwise noted, the following is valid for v in = 4.3 to 13.5 v, v bat = 2.6 to 4.4 v table 11 : temperature supervision electrical characteristics parameter symbol test conditions min typ max unit por temperature threshold t junc _por 150 c critical temperature threshold t junc_crit 140 c warning temperature threshold t junc_warn rising threshold tjunc_warn=0xb 125 c rising threshold tjunc_warn=0x0 70 c 7.6 v bat monitoring unless otherwise noted, the following is valid for ta = - 40 to +85 oc table 12: parameter symbol test conditions min typ max unit overvoltage threshold v bat_ov rising threshold, vbat_ov = 0x3c 5.1 v rising threshold, vbat_ov = 0x20 4.4 v rising threshold, vbat_ov = 0x00 3.6 v undervoltage threshold v bat_ uv falling threshold, vbat_uv = 0x32 3.25 v falling threshold, vbat_uv = 0x18 2.6 v falling threshold, vbat_uv = 0x0 2.0 v vbat monitoring hysteresis v bat_mon_hys 1.5% v bat_uv accuracy v bat_uv_acc -3% +3% v bat_ov accuracy v bat_ov_acc -1. 6 % +1. 6 % datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 12 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging 7.7 current consumption unless otherwise noted, the following is valid for t a = - 40 to +85 oc table 13: parameter symbol c onditions min typ max unit current (no - power mode) i q_no _ pwr _vbat v bat = 3.6 v 1 5 12 a current (disabled mode) i q_dis _vin v in = 5 v, v bat = 2.6 to 4.4 v 100 250 400 a datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 13 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging 8 typical characteristics figure 4 : efficiency v in = 12 v figure 5 : efficiency v in = 9 v figure 6 : efficiency v in = 5 v figure 7 : accuracy v in = 12 v figure 8 : accuracy v in = 9 v figure 9 : accuracy v in = 5 v 75.0 80.0 85.0 90.0 95.0 100.0 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 efficiency (%) charge current (a) vbatt=3.6v vbatt=3.8v vbatt=4.0v vbatt=4.2v vbatt=4.4v 80.0 82.0 84.0 86.0 88.0 90.0 92.0 94.0 96.0 98.0 100.0 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 efficiency (%) charge current (a) vbatt=3.6v vbatt=3.8v vbatt=4v vbatt=4.2v vbatt=4.4v 90.0 92.0 94.0 96.0 98.0 100.0 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 efficiency (%) charge current (a) vbatt=3.6v vbatt=3.8v vbatt=4.0v vbatt=4.2v vbatt=4.4v -5.0 -4.0 -3.0 -2.0 -1.0 0.0 1.0 2.0 3.0 4.0 5.0 0.5 0.75 1 1.25 1.5 1.75 2 2.25 accuracy (%) charge current (a) vbatt=3.6v vbat=3.8v vbatt=4v vbat=4.4v -5.0 -4.0 -3.0 -2.0 -1.0 0.0 1.0 2.0 3.0 4.0 5.0 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 accuracy (%) charge current (a) vbatt=3.6v vbatt=3.8v vbatt=4v vbatt=4.2v vbatt=4.4v -20.0 -15.0 -10.0 -5.0 0.0 5.0 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 accuracy (%) charge current (a) vbatt=3.6v vbatt=3.8v vbatt=4.0v datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 14 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging 9 system block diagram a block diagram of a typical application is illustrated in figure 10. main charger + - rcp isys hs ls bat. sw. da9155 hs ls ibus ibat buck control buck control vbus current sensing current sensing 2-wire interface ibats ibuss ibusm ibatm i2c soc adc charging control vsys vbat tbat vbus ibus ibatm ibat current sensing vbat sensing ovp pmic vddio ntc vddio avdd pvdd scl sda figure 10 : DA9155M system block diagram datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 15 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging 9.1 main charger the main charger is a fully featured charger that can operate as a stand - alone device. it is also designed to support an external slave charger. the main charger is responsible for the following functions : charging control (pre - charge, cc, cv, jeita) battery detection battery activation battery pre - charge cv - phase ibus sensing (ibusm + ibuss) reverse - current protection ibatm regulation ibat sensing (ibatm + ibats) battery isolation tbat monitoring vbat sensing 9.2 slave charger the slave charger provides a regulated current (ibat s) and it is enabled only in the cc - phase of charging. the slave charger does not feature a vbat regulation loop, and therefore, does not operate during cv - phase of charging. it is controlled by the application processor. the slave charger is responsible f or the following functions: ibats regulation hazard detection (vbat over - and undervoltage) for m ore detail s about the slave charger operation and the system integration , please refer to the application note. 10 functional description 10.1 control signals 10.1.1 en the en pin controls the buck_en register. a rising edge sets the register and a falling edge clears it. the rising edge of the en pin has to occur when DA9155M is in the disabled mode. the application processor can start the buck by asserting the en pin or by setting the buck_en bit through the 2 - wire interface. the level of the en pin can be read from s_en_pin register. a fault condition in the system (vin_drop, vin_ov, vin_uv, vbat_ov, vbat_uv, vio_uv, tjunc_crit) de - asserts buc k_en and triggers a transition to the disabled mode. if a rising edge of the en pin occurs while the fault condition re m ains, the buck is not enabled and an event indicating a blocked enable is triggered (e_en_block). re - enabling the buck after a fault con dition requires that status and event bits are cleared. the en pin can be shorted to ground when not used . datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 16 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging 10.1.2 nirq nirq is a level sensitive interrupt signal. it can be configured either as a push - pull or as an open drain output (irq_type), and the polarity can be selected (irq_level). the structure of the interrupt logic is depicted in figure 11. nirq is asserted when an un - masked event is asserted. the nirq will not be released until all event registers have been cleared. new events that occur during reading an event reg ister will be held until the event register has been cleared, ensuring that the host processor does not miss them. and nirq e _ rdy e _ tjunc _ warn e _ vbat _ ov e _ vbat _ uv e _ timer e _ vin _ drop m _ rdy m _ tjunc _ warn m _ vbat _ ov m _ vbat _ uv m _ timer m _ vin _ drop and and and and and or e _ xx m _ xx and irq _ level irq _ type and e _ en _ block m _ en _ block figure 11 : DA9155M interrupt logic 10.2 2 - wire interface the 2 - wire interface provides access to control and status registers. the interface supports operations compatible to standard, fast, fast - plus and high speed mode of the i 2 c bus specification rev. 3. communication on the 2 - wire bus is always between two devic es, one acting as the master and the other as the slave. the DA9155M will only operate as a slave. scl carries the 2 - wire clock and sda carries the bi - directional data. the 2 - wire interface is open - drain supporting multiple d evices on a single line. the bus lines have to be pulled high by external pull - up resistors (2 ? 20 k?). t hese are often shared between multiple devices connected to the interface . the attached devices only drive the bus lines low by connecting them to grou nd. as a result, two devices cannot conflict if they drive the bus simultaneously. in standard/fast mode the highest frequency of the bus is 400 khz. the exact frequency can be determined by the application and it does not have any relation to the DA9155M internal clock signals. DA9155M will follow the host clock speed within the described limitations and does not initiate any clock arbitration or slow down. an automatic interface reset can be trig gered in case the clock signal ceases to toggle for >35 ms (controlled in 2w_to). bus clear, if the sda is stuck, is achieved after receiving 9 clock pulses. operation in high speed mode at 3.4 mhz requires a minimum interface supply voltage of 1.8 v and a mode change in order to enable spike suppression and slop e control characteristics compatible to the i 2 c specification. the high speed mode can be enabled on a transfer - by - transfer basis by sending the master code (0000 1xxx) at the beginning of the trans fer. the DA9155M does not make a use of clock stretching and delivers read data without additional delay up to 3.4 mhz. alternatively the interface can be configured to use high speed mode continuously via pm_if_hsm, so that t he master code is not required at the beginning of every transfer. this reduces communication overhead on the bus, but limits the attachable bus slaves to compatible devices. datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 17 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging 10.2.1 register map paging the 2 - wire interface has direct access to two pages of the re gister map (up to 256 addresses). the register at address zero on each page is used as a page control register (the lsb of the page register is ignored). writing to the page control register changes the active page for all subsequent read/write operations unless an automatic return to page 0 was selected by asserting the revert register. alternatively, DA9155M offers a way to access register pages which avoids changing the active page via the page register. DA9155M can respond to multiple consecutive slave addresses and update the page register automatically based on the slave address. for example, when if_base_addr = 0x58, the page register responds to the slave address as follows: slave address = 0x58 ? page = 0x00 slave address = 0x59 ? page = 0x02 slave address = 0x5a ? page = 0x04 slave address = 0x5b ? page = 0x06 the consecutive addresses are obtained by replacing the two lsb in if_base_addr with ?00?, ?01?, ?10?, or ?11?. this feature can be enabled in the i2c_extend_en register. 10.2.2 details of the 2 - wire protocol all data is transmitted across the 2 - wire bus in 8 - bit groups. to send a bit the sda line is driven at the intended state while the scl is low. once the sda has settled, the scl line is brought high and then low. this pulse on scl clocks the sda bit into the receiver?s shift register. a two - byte serial protocol is used containing one address byte and one data byte. data and address transfer is transmitted msb first for both read and write operations. all transmission begins with the start condition from the master during which the bus is in idle state (the bus is free). it is initiated by a high - to - low transition on the sda line while the scl is in the high state. a stop condition is indicated by a low - to - high transition on the sda line while the scl is in the high state. the start and stop conditions are illustrated in figure 12 . start stop sda scl transaction figure 12 : timing of the start and stop conditions the 2 - wire bus will be monitored by DA9155M for a valid slave address whenever the interface is enabled. it responds immediately when it receives its own slave address. this is acknowledged by pulling the sda line low during the following clock cycle (white blocks marked with ?a? in the following figures). the protocol for a register write from master to slave consists of a start condition, a slave address, a read/write - bit, 8 - bit address, 8 - bit data, and a stop condition. DA9155M responds to all bytes with an ack. a register write operation is illustrated in figure 13. datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 18 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging slaveadr w regadr a data a p s = start condition a = acknowledge ( low) p = stop condition w = write (low) master to slave slave to master 7 - bits 1 - bit 8 - bits 8 - bits a s figure 13 : byte write operation when the host reads data from a register it first has to write - access DA9155M the target register address and then read - access DA9155M with a repeated start or alternatively a second start condition. after receiving the data, the host sends nack and terminates the transmission with a stop condition. th is is illustrated in figure 14. s slaveadr w a regadr a slaveadr a s = start condition a = acknowledge ( low) sr = repeated start condition a * = no a cknowledge p = stop condition w = write (low) r = read (high) master to slave 7 - bits 1 - bit 8 - bits 7 - bits data a * sr r 1 - bit 8 - bits slaveadr a 7 - bits data p s r 1 - bit 8 - bits p a * slave to master s slaveadr w a regadr p 7 - bits 1 - bit 8 - bits a figure 14 : examples of byte read operations consecutive (page) read - out mode is in itiated from the master by sending an ack instead of nack after receiving a byte, see figure 15 . the 2- wire control block then increments the address pointer to the ne xt register address and sends the data to the master. this enables an unlimited read of data bytes until the master sends a nack directly after receiving the data, followed by a subsequent stop condition. if a non - existent 2 - wire address is read out then t he DA9155M will return code zero. s slaveadr w a regadr a slaveadr a s = start condition a = acknowledge (low) sr = repeat start condition a * = no acknowledge p = stop condition w = write (low) r = read (high) master to slave slave to master 7 - bits 1 bit 8 - bits 7 - bits data a sr r 1 - bit 8 - bits s slav eadr w a regadr a slaveadr a 7 - bits 1 - bit 8 - bits 7 - bits data p s r 1 - bit 8 - bits p a a * p data data a a * data 8 - bits 8 - bits 8 - bits figure 15 : 2 - wire page r ead the slave address after the repeated start condition must be the same as the previous slave address. consecutive (page) write mode is supported if the master sends several data bytes following a slave register address. the 2 - wire control block then increments the address pointer to the next 2 - wire address, stores the received data, and sends an ack until the master sends a stop condition. the page write mode is illustrated in figure 16. datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 19 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging s sla veadr w a regadr a data a s = start condition a = acknowledge (low) sr = repeat start condition a * = no acknowledge p = stop condition w = write (low) r = read (high) master to slave slave to master 7 - bits 1 bit 8 - bits 8 - bits data a 1 - bit 8 - bits a p data ???. a 8 - bits repeated writes figure 16 : 2 - wire page write via control w rite_mode, a repeated write mode can be enabled. in this mode, the master can execute back - to - back write operations to non - consecutive addresses. this is achieved by transmitting register address and data pairs. the data will be stored in the address speci fied by the preceding byte. the repeated write mode is illustrated in figure 17. s sla veadr w a regadr a data a s = start condition a = acknowledge (low) sr = repeat start condition a * = no acknowledge p = stop condition w = write (low) r = read (high) master to slave slave to master 7 - bits 1 bit 8 - bits 8 - bits regadr a 1 - bit 8 - bits a p data ???. a 8 - bits repeated writes figure 17 : 2 - wire repeated write i f a new start or stop condition occurs within a message, the bus will return to idle - mode. 10.3 buck converter DA9155M features a buck converter that provides up to 2.5 a of regulated output current, with i out_acc regulation accura cy. the output current of the buck can be selected from a control register (buck_iout). in order to limit inrush current from the power supply, the buck converter features a soft - start function. whenever the buck is enabled or the output current is change d, the output current is ramped to the target value by running through the buck_iout steps at a rate defined by the start_slew and def_slew_rate registers. as the names imply, start_slew is used when the buck is enabled and def_slew_rate is used when disab ling the buck or changing between iout settings. the slew rate timings are summarized in table 14 . table 14 : slew rate timings with different register settings slew[2:0] time per iout step [ s] ramp rate [ma/ s] ramp time 250 ma - 2.5 a [ s] 0x5 10.67 0.938 2400 0x6 21.30 0.469 4800 0x7 42.70 0.234 9600 the buck features a programmable peak current limit (buck_ilim), which protects the pass devices and the inductor. hitting the limit triggers an e_buck_ilim event . during normal operation the e_buck_ilim event should not occur. however, the event can be used as an indication of abnormal system behaviour . the buck is enabled either by writing directly to a control register buck_en or asserting the en input. the soft - start feature described a bove is effective when the buck is enabled or disabled. the switching frequency is chosen high enough to allow the use of a small 0.47 h inductor. furthermore, the switching frequency can be adjusted with the buck_fsw and osc_frq registers in order to avo id interference to/from the main charger. the buck also features an automatic datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 20 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging frequency fold back mode, where the switching frequency is stepwise reduced until a required duty cycle can be achieved. without the frequency fold back the duty cycle is limited by the buck?s minimum off - time. it is recommended to configure the switching frequency to 1 mhz when operating with 5 v v in . 10.4 safety timer DA9155M features a safety timer that is intended to disable the buck converter in the event of system malfunction during charging. whenever the buck is enabled, either through the en pin or from a register, the safety timer is loaded with a pre - programmed value (timer_load) and it starts decrementing. in normal operation the application p rocessor should periodically re - initialize the safety timer by writing a new value to the timer_load register. the value of the counter can be read from the timer_count register. however, if the timer reaches zero an event is asserted, and the buck is auto matically disabled. the buck_en register is cleared and the buck is stopped by ramping down the output current at a rate defined in slew_rate. resuming normal operation requires that the event is cleared. 10.5 v in monitoring v in is monitored to detect a power supply insertion, and to ensure that v in is within an acceptable voltage range. the monitoring is illustrated in . when v in is below the vin2bat threshold DA9155M stays in the no - power mode. when v in rises above the vin2bat threshold, DA9155M moves to the reset mode where the internal supply and reference are enabled. vin vbat vin _ uv in 2 bat vbat _ ov vbat _ uv vref vin _ ov vin _ drop figure 18 : v in monitoring of DA9155M in reset, disabled, and active mode, v in is monitored against over - and undervoltage. if over - or undervoltage is detected, an event is triggered (e_vin_ov, e_vin_uv), the buck_en register is cleared, and DA9155M moves to disabled mode. re - enabling the buck requires that the status and event bits are cleared. during charging v in is monitored for weak charger or high impedance usb cable detection. if v in drops below the threshold v in_drop , an event is triggered (e_vin_drop) and the buck is automatically disabled. the buck_en register is cleared and the buck is stopped by ramping down the output current at a rate defined in def_slew_rate. the buck does not start automatically when the v in rises above the threshold. resuming normal operation requires that the status and event bits are cleared. this feature is targeted for use cases where the v in is above the standard datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 21 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging v bus , in which case the undervoltage lockout is too low to detect a weak supply. by default, v in_drop is set to the same voltage as the v in_uvlo , which effec tively disables the v in_drop . the status of the v in monitoring comparators can be read out from the status registers (s_vin_uv, s_vin_ov, s_vin_drop). 10.6 v bat monitoring the v bat monitoring is illustrated in . th e slave charger has to monitor the battery voltage in case of fault conditions during charging, meaning that battery over - and undervoltage have to be detected. DA9155M features two factory programmable settings f or handling the monitoring : 1. an overvoltage or undervoltage event triggers an event (e_vbat_ov, e_vbat_uv) and the buck_en register is de - asserted. resuming normal operation requires that v bat is within normal range and the events are cleared. the supervision of the battery voltage v bat is done by comparators. 2. an overvoltage or undervoltage event does not disable the buck converter. only the status registers are updated (default) . the v bat monitoring status comparators can always be read out from the status registers (s_vbat_uv, s_vbat_ov). 10.7 junction temperature supervision to protect DA9155M from damage due to excessive power dissipation the junction temperature is monitored continuously. the monitorin g is split into three temperature ranges t junc_warn (125 c ), t junc_crit (140 c ), and t junc_por (150 c ). if the junction temperature rises above the first threshold (tjunc_warn), the event e_tjunc_warn is asserted. if the event is not masked, this will f ire an interrupt. this first level of temperature supervision is intended for non - invasive temperature control, where the necessary measures for cooling the system down are left to the host software. the status of the t junc _warn comparator can be read from s_tjunc_warn. the interrupt is only generated when the temperature crosses the threshold from low to high. after the interrupt, the application processor can read out the comparator status to detect when the temperature drops below the threshold. if the j unction temperature continues to rise and crosses the second threshold (t junc_crit ), an event is fired (e_tjunc_crit), the buck_en is de - asserted, and DA9155M moves to the disabled mode. resuming normal operation requires that t junc drops below t junc_crit and the event is cleared. there is also a third temperature threshold (t junc_por ) which causes DA9155M to enter the reset mode. DA9155M stays in the reset mode as lo ng as the junction temperature is above t junc_crit . datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 22 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging figure 19 : junction temperature monitoring of DA9155M 10.8 power modes the power modes of DA9155M are illustrated in figure 20. disabled reset active functions : ? vin - vbat comparator ? bandgap ? vin comparator ? vbat comparator ? tjunc comparator ? vddcore ldo ? internal oscillator ? otp controller ? all outputs inactive otp read done && vin > vin _ uvlo && tjunc < tjunc _ crit active en == 0 || vbat < = vbat _ uv || vbat > = vbat _ ov || vin < = vin _ drop || vin < = vin _ uvlo || vin > = vin _ ovlo || e _ chg _ timeout || tjunc > = tjunc _ crit en == 1 && vbat > vbat _ uv && vbat < vbat _ ov && vin > vin _ drop && vin > vin _ uvlo && vin < vin _ ovlo && tjunc < tjunc _ crit && iovdd _ ok == 1 tjunc > tjunc _ por any state vin < v in 2 bat no - power ( 5 a ) active functions : ? vin - vbat comparator ? all outputs inactive vin > v in 2 bat any state active functions : ? vin - vbat comparator ? bandgap ? vin comparator ? vbat comparator ? tjunc comparator ? vddcore ldo ? internal oscillator ? i 2 c active functions : ? vin - vbat comparator ? bandgap ? vin comparator ? vbat comparator ? tjunc comparator ? vddcore ldo ? internal oscillator ? i 2 c ? buck figure 20 : power modes of DA9155M . the conditions for state transitions follow the c - language syntax. 10.8.1 no - power the no - power mode is the initial state of DA9155M . only the v in - v bat comparator is active in this state. when v in rises above v bat , DA9155M enters the reset mode . all ios are in their inactive state. the no - power mode is entered whenever v in drops below v bat . 10.8.2 reset DA9155M enters the reset mode when a power supply is attached and v in rises above v bat . in the reset mode, DA9155M will enable the internal reference, the internal supply, execute the reset sequence, and read the otp. once the otp is read and all the v in conditions are met, DA9155M moves automatically to the dis abled mode. temp_crit temp_warn vbe test[1:0] vcore vcore vt warn vt crit vt test1 vt test2 taps of the vref resistive divider bgap diode voltage twarn_en tcrit_en temp_por vcore tpor_en vt por vt test3 datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 23 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging the junction temperature monitoring is also enabled in the reset mode. if a junction over - temperature is detected during operation (tjunc tjunc_por), DA9155M moves back to the reset mode. 10.8.3 disabled in the disabled mode DA9155M is fully functional but the buck has not been enabled. an event is fired when entering the disabled mode to notify the application processor that the slave charger is ready for operation. if a faul t condition exists (t junc , v bat , or v in ), the enable signal is blocked, DA9155M stays in the disabled mode, and an event is triggered. DA9155M moves to the active mode when the buck is enabled either by asserting the en signal or by setting the buck_en register. 10.8.4 active in the active mode DA9155M is fully functional and the buck is running. DA9155M moves back to the disabled mode if the buck is disabled, the safety timer expires, or if there is a fault condition (t junc , v bat , or v in ). datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 24 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging 11 register map 11.1 overview addr register 7 6 5 4 3 2 1 0 page control 0x000 page_ctrl_0 revert write_mode page status and events 0x001 status_a s_en_block s_vin_ov s_vin_drop s_vin_uv s_vbat_ov s_vbat_uv s_tjunc_crit s_tjunc_warn 0x002 status_b s_buck_ilim s_en_pin mode 0x003 event_a e_en_block e_vin_ov e_vin_drop e_vin_uv e_vbat_ov e_vbat_uv e_tjunc_crit e_tjunc_warn 0x004 event_b e_tjunc_por e_vddio_uv e_timer e_buck_ilim e_rdy 0x005 irq_mask_a m_en_block m_vin_ov m_vin_drop m_vin_uv m_vbat_ov m_vbat_uv m_tjunc_crit m_tjunc_warn 0x006 irq_mask_b m_tjunc_por m_vddio_uv m_timer m_buck_ilim m_rdy vin and vbat monitoring 0x007 control_a vin_drop 0x008 control_b vbat_uv 0x009 control_c vbat_ov configuration 0x00a control_d start_slew def_slew_rate 0x00b control_e timer _dis tjunc_warn safety timer 0x00c timer_a timer_count 0x00d timer_b timer_load buck control 0x00e buck_ctrl buck_en 0x00f buck_ilim buck_ilim 0x010 buck_iout buck_iout interface 0x011 interface if_base_addr 0x012 config_a vddio_conf i2c_extend_en 2w_to 2w_if_hsm irq_level irq_type configuration 0x013 config_b osc_frq buck_fsw page control 0x080 page_ctrl_1 revert write_mode page page control 0x100 page_ctrl_2 revert write_mode page page control 0x180 page_ctrl_3 revert write_mode page page control 0x200 page_ctrl_4 revert write_mode page page control 0x280 page_ctrl_5 revert write_mode page page control 0x300 page_ctrl_6 revert write_mode page trimming and engineering 0x319 ana_en g _otp_ 9 eng_vddio_uv_d is eng_tjunc_cri t_dis eng_vbat_ov_ dis eng_vbat_uv_ dis eng_vin_drop _dis datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 25 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging 11.2 register descriptions 11.3 page 0 11.3.1 page control page_ctrl_0 (0x000) field slice description revert 7:7 0: page maintains its value until re - written 1: page reverts to 0 after one access write_mode 6:6 behavior upon sequential write accesses over the 2 - wire interface 0: write data to consecutive addresses 1: write data to arbitrary addresses using address - data pairs page 5:0 top 6 bits of the register address. 11.3.2 status and events status_a (0x001) field slice description s_en_block 7:7 a status bit in status_a is blocking the buck from being enabled. s_vin_ov 6:6 vin overvoltage comparator status s_vin_drop 5:5 vin drop comparator status s_vin_uv 4:4 vin undervoltage comparator status s_vbat_ov 3:3 vbat overvoltage comparator status s_vbat_uv 2:2 vbat undervoltage comparator status. s_tjunc_crit 1:1 tjunc crit comparator status s_tjunc_warn 0:0 tjunc_warn comparator status status_b (0x002) field slice description reserved 8:3 s_buck_ilim 2:2 status (debounced) of the peak current comparator. s_en_pin 1:1 status of the en pin. mode 0:0 DA9155M mode: disabled (0) or active (1). event_a (0x003) field slice description e_en_block 7:7 an enable signal was blocked. the reason for the blocking can be read out from the status_a register. e_vin_ov 6:6 vin exceeded the vin_ovlo threshold. e_vin_drop 5:5 vin dropped below the vin_drop threshold. e_vin_uv 4:4 vin dropped below the vin_uvlo threshold. e_vbat_ov 3:3 the battery voltage exceeded the vbat_ov threshold. datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 26 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging e_vbat_uv 2:2 the battery voltage dropped below the vbat_uv threshold. e_tjunc_crit 1:1 the junction temperature exceeded the tjunc_crit threshold. e_tjunc_warn 0:0 junction temperature crossed the tjunc_warn threshold. only a low -to - high transition triggers the event. event_b (0x004) field slice description reserved 7:5 e_tjunc_por 4:4 the junction temperature crossed the tjunc_por threshold and caused an entry to the reset mode. this bit is only reset upon a transition from the no - power mode to the reset mode. e_vddio_uv 3:3 vddio dropped below a threshold. this event causes the i2c interface to be reset. e_timer 2:2 the safety timer expired. e_buck_ilim 1:1 the peak output current exceeded the limit buck_ilim. e_rdy 0:0 DA9155M moved to the disabled mode. the e vent is not gener ated if vddio is below the monitoring threshold (vddio_conf). irq_mask_a (0x005) field slice description m_en_block 7:7 mask bit for e_en_block m_vin_ov 6:6 mask bit for e_vin_ov m_vin_drop 5:5 mask bit for e_vin_drop m_vin_uv 4:4 mask bit for e_vin_uv m_vbat_ov 3:3 mask bit for e_vbat_ov m_vbat_uv 2:2 mask bit for e_vbat_ub m_tjunc_crit 1:1 mask bit for e_tjunc_crit m_tjunc_warn 0:0 mask bit for e_tjunc_warn irq_mask_b (0x006) field slice description reserved 7:5 m_tjunc_por 4:4 mask bit for e_tjunc_por m_vddio_uv 3:3 mask bit for e_vddio_uv m_timer 2:2 mask bit for e_timer m_buck_ilim 1:1 mask bit for e_buck_ilim m_rdy 0:0 mask bit for e_rdy 11.3.3 vin and vbat monitoring control_a (0x007) field slice description vin_drop 7:0 vin drop threshold. datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 27 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging n=0x0,0x1,...,0xe: vin_drop=4.3+(n0.05) v n=0xf,0x10,...,0x1d: vin_drop=5.0+((n - 0xe)0.2) v n=0x1e,0x1f,...,0x27: vin_drop=8.0+((n - 0x1d)0.1) v n=0x28,0x29,...,0x31: vin_drop=9.0+((n - 0x27)0.2) v n=0x32,0x33,...,0x3b: vin_drop=11.0+((n - 0x31)0. 1) v the maximum value is 12.0 v (0x3b). any value greater than the maximum will be stored in the register but limited to the maximum at the output. control_b (0x008) field slice description reserved 7:6 vbat_uv 5:0 vbat undervoltage. vbat_uv=2.0+(n0.025) v. control_c (0x009) field slice description reserved 7:6 vbat_ov 5:0 vbat overvoltage. vbat_ov=3.6+(n0.025) v. 11.3.4 configuration control_d (0x00a) field slice description reserved 7:7 start_slew 6:4 slew rate control for the buck start. the enumeration is the same as def_slew_rate reserved 3:3 def_slew_rate 2:0 slew rate control for the output current changes. each output current step (10 ma) is delayed with t_step=osc/(2^n1), where osc is the high frequency oscillator (6 mhz default). the minimum value for n is 5 (101). the effective slew rate is then given by the current change (i_delta), the number of steps required for the change (i_delta/10 ma), and the time spend in each step (t_step): slew_rate=i_delta/((i_delta/10 m a)t_step) control_e (0x00b) field slice description reserved 7:5 timer_dis 4:4 disables the safety timer. 1 = safety timer disabled 0 = safety timer enabled tjunc_warn 3:0 junction temperature warning threshold. tjunc_warn=70+(n5) c datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 28 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging 11.3.5 safety timer timer_a (0x00c) field slice description timer_count 7:0 countdown value of the safety timer. decremented at 1 s intervals. reading the register gives the current timer value. writing the register has no affect. timer_b (0x00d) field slice description timer_load 7:0 safety timer pre - load and re- load. writing the register when the buck is not enabled sets the pre - load value. the pre- load value is automatically loaded in to timer_count the next time the buck is enabled. writing the register d uring buck operation loads the written value in to timer_count. 11.3.6 buck control buck_ctrl (0x00e) field slice description reserved 7:1 buck_en 0:0 buck enable. the register is also set at the rising edge of the en pin and cleared at the falling edge. buck_ilim (0x00f) field slice description reserved 7:5 buck_ilim 4:0 peak current limit. buck_ilim=(3000+n100) ma the maximum value is 5.5 a (0x19). any value greater than the maximum will be stored in the register but limited to the maximum at the output buck_iout (0x010) field slice description buck_iout 7:0 buck output current. iout=250+(n10) ma the minimum value is 400 ma (0x0f). the maximum value is 2.5 a (0xe1). any value greater than the maximum will be stored in the register but limited to the maximum at the output. datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 29 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging 11.3.7 interface interface (0x011) field slice description if_base_addr 7:1 slave address of DA9155M . reserved 0:0 config_a (0x012) field slice description vddio_conf 7:6 vddio monitoring threshold. 00: 1.5 v 01: 1.8 v 10: 3.3 v 11: 3.6 v i2c_extend_en 5:5 enable page decoding from the 3 lsbs of the incoming slave address. 0: DA9155M responds normally to the i2c slave address programmed in if_base_addr. the register map page is changed by writing to the page register. 1: da915 5m will respond to multiple the slave addresses and decode the page from the 3 lsbs. if_base_addr[7:4] + 0: page = 0x00 if_base_addr[7:4] + 1: page = 0x02 if_base_addr[7:4] + 2: page = 0x04 if_base_addr[7:4] + 3: page = 0x06. 2w_to 4:4 enable 35 ms timeout for the 2 - wire interface. 2w_if_hsm 3:3 puts the 2 - wire interface permanently in high- speed mode. reserved 2:2 irq_level 1:1 selects the polarity of nirq: active low (0) or active high (1). irq_type 0:0 select the type of nirq output: open- drain (0) or push - pull (1). 11.3.8 configuration config_b (0x013) field slice description osc_frq 7:4 oscillator frequency tuning: 0000: no tune 0001: +200 khz 0010: +400 khz 0011: +600 khz 0100: +800 khz 0101: +1000 khz 0110: +1200 khz 0111: no tune 1000: no tune 1001: - 200 khz 1010: - 400 khz 1011: - 600 khz datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 30 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging 1100: - 800 khz 1101: - 1000 khz 1110: - 1200 khz 1111: no tune reserved 3:2 buck_fsw 1:0 switching frequency of the buck converter. the buck clock is a divided version of the tuned oscillator frequency osc. 00: osc/5 01: osc/3 10: osc/4 11: osc/6 11.4 page 1 11.4.1 page control page_ctrl_1 (0x080) field slice description revert 7:7 0: page maintains its value until re - written 1: page reverts to 0 after one access write_mode 6:6 behavior upon sequential write accesses over the 2 - wire interface 0: write data to consecutive addresses 1: write data to arbitrary addresses using address - data pairs page 5:0 top 6 bits of the register address. 11.5 page 2 11.5.1 page control page_ctrl_2 (0x100) field slice description revert 7:7 0: page maintains its value until re - written 1: page reverts to 0 after one access write_mode 6:6 behavior upon sequential write accesses over the 2 - wire interface 0: write data to consecutive addresses 1: write data to arbitrary addresses using address - data pairs page 5:0 top 6 bits of the register address. 11.6 page 3 11.6.1 page control page_ctrl_3 (0x180) field slice description revert 7:7 0: page maintains its value until re - written 1: page reverts to 0 after one access datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 31 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging write_mode 6:6 behavior upon sequential write accesses over the 2 - wire interface 0: write data to consecutive addresses 1: write data to arbitrary addresses using address - data pairs page 5:0 top 6 bits of the register address. 11.7 page 4 11.7.1 page control page_ctrl_4 (0x200) field slice desc ription revert 7:7 0: page maintains its value until re - written 1: page reverts to 0 after one access write_mode 6:6 behavior upon sequential write accesses over the 2 - wire interface 0: write data to consecutive addresses 1: write data to arbitrary addresses using address - data pairs page 5:0 top 6 bits of the register address. 11.8 page 5 11.8.1 page control page_ctrl_5 (0x280) field slice description revert 7:7 0: page maintains its value until re - written 1: page reverts to 0 after one access write_mode 6:6 behavior upon sequential write accesses over the 2 - wire interface 0: write data to consecutive addresses 1: write data to arbitrary addresses using address - data pairs page 5:0 top 6 bits of the register address. 11.9 page 6 11.9.1 page control page_ctrl_6 (0x300) field slice description revert 7:7 0: page maintains its value until re - written 1: page reverts to 0 after one access write_mode 6:6 behavior upon sequential write accesses over the 2 - wire interface 0: write data to consecutive addresses 1: write data to arbitrary addresses using address - data pairs page 5:0 top 6 bits of the register address. datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 32 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging 11.9.2 trimming and engineering ana_end_otp_9 (0x319) field slice description eng_vddio_uv_dis 7:7 0: vddio monitoring is enabled 1: vddio monitoring is disabled reserved 6:6 eng_tjunc_crit_di s 5:5 0: tjunc crit comparator is enabled 1: tjunc crit comparator is disabled eng_vbat_ov_dis 4:4 0: vbat over voltagecomparator is enabled 1: vbat overvoltage comparator is disabled eng_vbat_uv_dis 3:3 0: vbat undervoltage comparator is enabled 1: vbat undervoltage comparator is disabled reserved 2:2 eng_vin_drop_dis 1:1 0: vin drop comparator is enabled 1: vin drop comparator is disabled reserved 0:0 datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 33 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging 12 application information 12.1 pcb layout 1608 2520 en nirq sda scl nc 0 agnd agnd tp nc 1 agnd agnd vddio agnd agnd agnd vbat pgnd vlx vlx vlx boot pvdd avdd vbatn vin pgnd vlx vlx vlx vin 1005 1005 1608 1005 power ground power ground quiet ground 112 112 112 112 112 112 112 112 112 figure 21 : preliminary pcb layout for DA9155M (component sizes in mm) it is recommended to create a separate quiet ground for the avdd capacitor connection. the pcb layout s hould ensure this groun d is kept quiet, for example, they should be separated from the main noisy power ground return path. the quiet ground can then be connected to the main grou n d at the ground plane. 12.2 component selection 12.2.1 capacitors ref value size code [m m] temp. char. tol. rating part buck i nput b ypass 10 f 1608 x5r 20% 25 v cl10a106ma8nrnc 10 f 1608 x5r 20% 25 v murata grm188r61e106ma73 buck o utput b ypass 22 f 1608 x5r 20% 6.3 v murata grm188r60j226mea0 10 f 1608 x5r 20% 6.3 v grm188r60j106me84 datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 34 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging ref value size code [m m] temp. char. tol. rating part buck bootstrap 10 nf 0603 x5r 10% 16 v cl03a103ko3nnnc 10 nf 1005 x7r 10% 16 v murata grm15xr71c103ka86 avdd output bypass 2.2 f 1005 x5r 20% 6.3 v cl05a225mq5nsdc 2.2 f 1005 x5r 20% 6.3 v murata grm155r60j225me95 pvdd output bypass 2.2 f 1005 x5r 20% 6.3 v cl05a225mq5nsdc 2.2 f 1005 x5r 20% 6.3 v murata grm155r60j225me95 12.2.2 inductor ref value isat [a] irms [a] dcr (typ) [m ? ] size (l w h) [mm] part buck 0.47 h 6.0 4.5 24 2.5 2.0 1.0 cigt252010lmr47mne datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 35 of 36 ? 2016 dialog semiconductor
DA9155M 2.5 a companion charger for rapid charging status d efinitions revi sion data s heet s tatus product s tatus definition 1. target development this data sheet contains the design specifications for product development. specifications may be changed in any manner without notice. 2. preliminary qualification this data sheet contains the specifications and preliminary characteri s ation data for products in pre - production. s pecifications may be changed at any time without notice in order to improve the design. 3. final production this data sheet contains the final specifications for products in volume production. the specifications may be changed at any time in order to improve the design, manufacturing , and supply. relevant changes will be communicated via customer product notifications. 4. obsolete archived this data sheet contains the specifications for discontinued products. the information is provided for reference only. disclaimer information in this document is believed to be accurate and reliable. however, dialog semiconductor does not give any represent ations or warranties, expressed or implied, as to the accuracy or completeness of such information. dialog semiconductor furthermore takes no responsibility whatsoever for the content in this document if provided by any information so urce outside of dialog semiconductor. dialog semiconductor reserves the right to change without notice the information published in this document, including withou t limitation , the specification and the design of the related semiconductor products, softwar e and applications. applications, software, and semiconductor products described in this document are for illustrative purposes only. dialog semiconductor makes no representation or warranty that such applications, software and semiconductor products will be suitable for the specified use without further testing or modification. unless otherwise agreed in writing, such testing or modification is the sole responsibility of the customer and dialog semiconductor excludes all liability in this respect. custom er notes that nothing in this document may be construed as a license for customer to use the dialog semi - conductor products, software and applications referred to in this document. such license must be separately sought by customer with dialog semiconducto r. all use of dialog semiconductor products, software and applications referred to in this document are subject to dialog semiconductor?s standard terms and conditions of sale , unless otherwise stated. ? dia log semiconductor gmbh. all rights reserved. rohs c ompliance dialog semiconductor complies to european directive 2001/95/ec and from 2 january 2013 onwards to european directive 2011/65/eu concerning restriction of hazardous substances (rohs/rohs2). dialog semiconductor?s statement on rohs can be found on the customer portal https://support.diasemi.com/ . rohs certificates from our sup pliers are available on request. contacting dialog semiconductor germany headquarters dialog semiconductor gmbh phone: +49 7021 805 - 0 united kingdom dialog semiconductor (uk) ltd phone: +44 1793 757700 the netherlands dialog semiconductor b.v. phone: +31 73 640 88 22 north america dialog semiconductor inc. phone: +1 408 727 320 0 japan dialog semiconductor k. k. phone: +81 3 5425 4567 taiwan dialog semiconductor taiwan phone: +886 226 580 388 singapore dialog semiconductor singapore phone: +65 64845419 china dialog semiconductor china phone: +852 2607 4271 korea dialog semiconductor korea phone: +82 2 569 2301 email: enquiry@diasemi.com web site: www.dialog - semiconductor.com datasheet v3.0 5 2 2 - j uly - 2016 cfr0011 - 120 - 00 rev 5 36 of 36 ? 2016 dialog semiconductor

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